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JTAG programming software
Boundary Scan JTAG


» Scan Exec Brochure

» Eclipse Family Overview » Test Development
» Manufacturing Test
» Diagnostics and Repair

Standard Features:


» Test Execution
» Test Flow Control
» Diagnostics
» Debug
» Data Logging
»
Schematic Debugger
»
Physical Debugger

Optional Capabilities:


» Advanced Diagnostics
» C++ and Libraries
» Network Licensing

Hardware Options:


» UltraTAP
» RCT-II
» PCI ScanLab
» Parallel Port


Boundary Scan Intelligent Diagnostics (BSID) Overview

VICTORY's Boundary-Scan Intelligent Diagnostics (BSID) module generates diagnostics for three kinds of VICTORY tests: Boundary In-Circuit Test (BICT), Virtual Interconnect Test (VIT), and Virtual Component and Cluster Test (VCCT).

BSID can be run on a test system as part of a comprehensive test program or run off-line at a diagnostic repair station. When a boundary-scan test fails, BSID uses the failure data generated by a VICTORY module and the digital test results generated by a tester to isolate the failing devices and the networks involved. To generate diagnostics for a virtual cluster test, BSID uses fault-dictionary techniques and must be supplied with a fault-dictionary database.

Today, BSID is available for Teradyne Z1800-Series and L-Series test systems, and Intellitech's Gemini, PCI Scan Lab and RCT scan-based testers.

How BSID works

BSID uses two key inputs: the diagnostic database supplied by a VICTORY test module and the digital test failure data (DTFD) reported by the tester. The diagnostic database, which is produced by VICTORY modules in the course of generating boundary-scan tests, contains information about the assembly-under-test: the netlist, tester access, the scan path, and the scan vectors. The database also contains additional information needed by BSID to diagnose certain test failures: expect data to diagnose VIT failures and a fault dictionary to diagnose VCCT failures. Expect data is gen-erated automatically by the VIT module. Fault dictionaries are generated by test developers, typically using a fault simulator.

The DTFD is an ASCII-format file, generated by a test system, that identi-fies the tester pins that failed and the pattern numbers they failed on. When BSID is used in non-Teradyne test environments, a software engineer can use the VICTORY Failure Reporting Kit to convert the failure data reported by a test system into DTFD format.

VIT diagnostics

BIT tests can fail under a variety of conditions. BSID diagnoses the following failure types. In all cases, BSID clearly states the problem, lists all inputs and outputs on the net, and identifies the failing detect points. The diagnostics generated by BSID for BIT failures include TAPIT failures detected as part of BIT testing.

All inputs on a net are stuck either at a logic 1 or a logic 0. Typically, the problem is an open on the net or the net is shorted to power or ground.

Some inputs on a net are stuck either at a logic 1 or a logic 0. This condition typically results from an open on the part of the net that connects the stuck input(s).

Net is stuck either at a logic 1 or a logic 0 only when a particular driver is active. Most often, the problem is an open at the specified driver lead on a bus.

Shorts between nets

Common bridging faults between nets are clearly diagnosed Many testers and simulators accept truthby BSID regardless of whether a logic 1 or a logic 0 wins.

Strong driver short

Typically, a high current driver or a tester pin is shorted to some other net(s). The prob-lem is that the net with the strong driver never fails because it overdrives other net(s) involved in the short.

Faulty bidirectional pin

This failure type is typically caused by a blown input or output driver at the bidirectional pin. As a result, the boundary-scan output cell for the bidirectional pin drives the correct data onto the net but its associated boundary-scan input cell does not capture the correct value. Alternatively, the boundary-scan input cell captures the correct value from other drivers on the net, but its associated boundary-scan output cell is not able to drive the net.

Extended stuck-at faults

Leaky bus drivers can cause a test to fail by overdriving the active driver on a bus. Shorts between boundary-scan nets and non-boundary-scan nets. As part of an in-circuit test program, BIT Plus patterns can detect shorts between boundary-scan nets that have no tester access and non-boundary-scan nets with tester access.

Benefits

  • Automatic diagnosis of BIT Eclipse ATPG and VCCT test failures
  • Can be run on the tester or at an off-line repair station
  • Currently available for Teradyne board test systems and Intellitech test systems
  • Transportable to other test systems